1. Field of the Invention
The present invention relates to a semiconductor device including a multilayer wiring structure.
2. Related Art
With recent demands on faster operation speed of semiconductor devices, a great deal of investigational efforts have been made on alteration of an insulating interlayer from conventional silicon oxide film (dielectric constant K=4.3 or around) to a low-dielectric-constant insulating material layer, in order to reduce the inter-wiring capacitance. Examples of the low-dielectric-constant insulating materials include HSQ, MSQ, carbon-containing silicon oxide material and aromatic-group-containing organic resin material those having a dielectric constant of 3 or around. In pursuit of further reduction in the dielectric constant, recent developmental efforts are also made on a porous material having micro-pores introduced into the film. Use of this sort of low-dielectric-constant insulating material to the insulating interlayer makes it possible to reduce inter-wiring crosstalk, and to realize fast operations of elements.
However, the low-dielectric-constant insulating films generally have problems such as those films are relatively weak and have poor adhesiveness to other films. In addition, there is another problem that when the contents of the metal material is low, the low-dielectric-constant insulating film is over polished by CMP (Chemical Mechanical Polishing) process as the low-dielectric-constant insulating film itself is weak.
Japanese Laid-Open Patent Publication No. 2000-340529 disclosed a semiconductor device including a dummy wiring pattern formed continuously in one piece on dicing lines or within a chip in order to surround a mark part. With this structure, it is said, that the dishing can be prevented at CMP in forming the semiconductor.
As described above, although the low-dielectric-constant insulating films are relatively weak, as for the interlayer dielectric film in which interconnects or wirings are formed, the film is strengthened by the metals introduced in the film because the ratio of metals in the film becomes relatively high. Therefore, the low-dielectric-constant insulating films can be used to the interlayer dielectric film for forming interconnects therein. However, as for the interlayer dielectric film in which vias are formed, it was difficult to use the low-dielectric-constant insulating films because the ratio of metals therein is not high. Thus, there was a problem that the dielectric constant of the semiconductor device cannot be reduced even when the low-dielectric-constant insulating films are used for forming interconnects therein because the low-dielectric-constant insulating films cannot be used to the films for forming vias therein.
In addition, as the low-dielectric-constant insulating films have poor adhesiveness to other films, when heat stresses are applied to a multilayer wiring structure including the low-dielectric-constant insulating films, peeling-off of the films are easily occurred. This sort of peeling-off occurs even when the low-dielectric-constant insulating films are not used as the interlayer dielectric films.